mirror of
https://github.com/Xevion/easy7zip.git
synced 2025-12-07 09:15:00 -06:00
Update to 7-Zip 17.01 Beta from Igor Pavlov
- Minor speed optimization for LZMA2 (xz and 7z) multi-threading compression.
7-Zip now uses additional memory buffers for multi-block LZMA2 compression.
CPU utilization was slightly improved.
- 7-zip now creates multi-block xz archives by default. Block size can be
specified with -ms[Size]{m|g} switch.
- xz decoder now can unpack random block from multi-block xz archives. 7-Zip
File Manager now can open nested multi-block xz archives (for example,
image.iso.xz) without full unpacking of xz archive.
- 7-Zip now can create zip archives from stdin to stdout.
- 7-Zip command line: @listfile now doesn't work after -- switch. Use
-i@listfile before -- switch instead.
fixed bugs:
- 7-Zip could add unrequired alternate file streams to WIM archives, for
commands that contain filename wildcards and -sns switch.
- 7-Zip 17.00 beta crashed for commands that write anti-item to 7z archive.
- 7-Zip 17.00 beta ignored "Use large memory pages" option.
This commit is contained in:
22
C/CpuArch.h
22
C/CpuArch.h
@@ -1,5 +1,5 @@
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/* CpuArch.h -- CPU specific code
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2017-04-03 : Igor Pavlov : Public domain */
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2017-06-30 : Igor Pavlov : Public domain */
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#ifndef __CPU_ARCH_H
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#define __CPU_ARCH_H
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@@ -190,8 +190,7 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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#ifdef MY_CPU_LE
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#if defined(MY_CPU_X86_OR_AMD64) \
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|| defined(MY_CPU_ARM64) \
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|| defined(__ARM_FEATURE_UNALIGNED) \
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|| defined(__AARCH64EL__)
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|| defined(__ARM_FEATURE_UNALIGNED)
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#define MY_CPU_LE_UNALIGN
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#endif
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#endif
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@@ -237,6 +236,11 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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#endif
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#ifdef __has_builtin
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#define MY__has_builtin(x) __has_builtin(x)
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#else
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#define MY__has_builtin(x) 0
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#endif
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#if defined(MY_CPU_LE_UNALIGN) && /* defined(_WIN64) && */ (_MSC_VER >= 1300)
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@@ -244,15 +248,21 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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#include <stdlib.h>
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#pragma intrinsic(_byteswap_ushort)
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#pragma intrinsic(_byteswap_ulong)
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#pragma intrinsic(_byteswap_uint64)
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/* #define GetBe16(p) _byteswap_ushort(*(const UInt16 *)(const Byte *)(p)) */
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#define GetBe32(p) _byteswap_ulong(*(const UInt32 *)(const Byte *)(p))
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#define GetBe64(p) _byteswap_uint64(*(const UInt64 *)(const Byte *)(p))
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#define SetBe32(p, v) (*(UInt32 *)(void *)(p)) = _byteswap_ulong(v)
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#elif defined(MY_CPU_LE_UNALIGN) && defined (__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3))
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#elif defined(MY_CPU_LE_UNALIGN) && ( \
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(defined(__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3))) \
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|| (defined(__clang__) && MY__has_builtin(__builtin_bswap16)) )
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/* #define GetBe16(p) __builtin_bswap16(*(const UInt16 *)(const Byte *)(p)) */
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#define GetBe32(p) __builtin_bswap32(*(const UInt32 *)(const Byte *)(p))
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#define GetBe64(p) __builtin_bswap64(*(const UInt64 *)(const Byte *)(p))
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@@ -277,10 +287,14 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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#endif
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#ifndef GetBe16
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#define GetBe16(p) ( (UInt16) ( \
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((UInt16)((const Byte *)(p))[0] << 8) | \
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((const Byte *)(p))[1] ))
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#endif
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#ifdef MY_CPU_X86_OR_AMD64
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